Preliminary outline:
1. Introduction
- Design of digital systems: models and flows
- Historic overview
2. Representations of Boolean functions and algorithms for efficient Boolean reasoning
- Boolean algebra, Boolean functions and incompletely specifies functions
- Circuits, And/Inverter Graphs (AIGs)
- Boolean formulae and two-level representations (SOP and POS)
- BDDs and SAT
- Reachability analysis
3. Combinational synthesis
- Combinationality
- Two-level and multi-level technology-independent synthesis
- Technology mapping
4. Sequential synthesis
- Initialization
- Synchronous synthesis
- Retiming and resynthesis
- De-synchronization
5. Verification
- Equivalence checking
- Combinational and sequential equivalence checking
- Register correspondence and functional dependency
- Safety property checking
- BDD- and SAT-based approaches
6. Timing
- Timing models and timing analysis
- Timing optimization7. Low-power synthesis
- Power analysis
- Clock gating
- Use of multi-VDD and multi-Vth gates

Textbook:
No required textbook. Good reference books include
- Logic Synthesis and Verification. S. Hassoun and T. Sasso (Editors). Kluwer Academic Publishers, 2001.
- Logic Synthesis and Verification Algorithms. G. Hachtel and F. Somenzi. Kluwer Academic Publishers, 1996.
- Boolean Reasoning. F. Brown. Kluwer Academic Publishers, 1990.

Grading: TBD

Prerequisite:
No prerequisite. However, backgrounds in logic design, algorithms, and complexity theory may be helpful. (There may be some programming assignments (in C/C++).)